W25Q256FVEIG

The W25Q256FV (256M-bit) Serial Flash memory provides a storage solution for systems with limited
space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash
devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP)
and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current
consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving
packages.
The W25Q256FV array is organized into 131,072 programmable pages of 256-bytes each. Up to 256
bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of
128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The
W25Q256FV has 8,192 erasable sectors and 512 erasable blocks respectively. The small 4KB sectors
allow for greater flexibility in applications that require data and parameter storage. (See Figure 2.)
The W25Q256FV support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2-
clocks instruction cycle Quad Peripheral Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI),
I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing
equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when
using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard
Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient
memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP
(execute in place) operation.
A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide
further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device ID
and SFDP Register, a 64-bit Unique Serial Number and three 256-bytes Security Registers.

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    SPECIFICATION

     New Family of SpiFlash Memories
    – W25Q256FV: 256M-bit / 32M-byte
    – Standard SPI: CLK, /CS, DI, DO, /WP, /Hold
    – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold
    – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3
    – 3 or 4-Byte Addressing Mode
    – Software & Hardware Reset
     Highest Performance Serial Flash
    – 104MHz Standard/Dual/Quad SPI clocks
    – 208/416MHz equivalent Dual/Quad SPI
    – 50MB/S continuous data transfer rate
    – More than 100,000 erase/program cycles
    – More than 20-year data retention
     Efficient “Continuous Read”
    – Continuous Read with 8/16/32/64-Byte Wrap
    – As few as 8 clocks to address memory
    – Quad Peripheral Interface (QPI) reduces
    instruction overhead
    – Allows true XIP (execute in place) operation
    – Outperforms X16 Parallel Flash
     Low Power, Wide Temperature Range
    – Single 2.7 to 3.6V supply
    – 4mA active current, <1µA Power-down (typ.)
    – -40°C to +85°C operating range
     Flexible Architecture with 4KB sectors
    – Uniform Sector/Block Erase (4K/32K/64K-Byte)
    – Program 1 to 256 byte per programmable page
    – Erase/Program Suspend & Resume
     Advanced Security Features
    – Software and Hardware Write-Protect
    – Power Supply Lock-Down and OTP protection
    – Top/Bottom, Complement array protection
    – Individual Block/Sector array protection
    – 64-Bit Unique ID for each device
    – Discoverable Parameters (SFDP) Register
    – 3X256-Bytes Security Registers with OTP locks
    – Volatile & Non-volatile Status Register Bits
     Space Efficient Packaging
    – 8-pad WSON 8×6-mm
    – 8-pin PDIP 300-mil
    – 16-pin SOIC 300-mil (additional /RESET pin)
    – 24-ball TFBGA 8×6-mm
    – Contact Winbond for KGD and other options