TPS3106K33DBVR

The TPS310x and TPS311x families of supervisory
circuits provide circuit initialization and timing
supervision, primarily for DSP and processor-based
systems.
During power-on, RESET is asserted low when the
supply voltage (VDD) becomes higher than 0.4 V.
Thereafter, the supervisory circuit monitors VDD and
keeps the RESET output low as long as VDD remains
below the threshold voltage (VIT–
). To ensure proper
system reset, after VDD surpasses the threshold
voltage, an internal timer delays the transition of the
RESET signal from low to high for the specified time.
When VDD drops below VIT–
, the output transitions low
again.
All the devices of this family have a fixed-sense
threshold voltage (VIT–
) set by an internal voltage
divider.
The TPS3103 and TPS3106 devices have an activelow, open-drain RESET output and either an
integrated power-fail input (PFI) or SENSE input with
corresponding outputs for monitoring other voltages.
The TPS3110 has an active-low push/pull RESET
and a watchdog timer to monitor the operation of
microprocessors. All three devices have a manual
reset pin that can be used to force the outputs low
regardless of the sensed voltages.
The product spectrum is designed for supply voltages
of 0.9 V up to 3.6 V. The circuits are available in 6-pin
SOT-23 packages. The TPS31xx family is
characterized for operation over a temperature range
of –40°C to 125°C.