• Core: ARM® 32-bit Cortex®-M0 CPU,
frequency up to 48 MHz
• Memories
– 16 to 64 Kbytes of Flash memory
– 8 Kbytes of SRAM with HW parity checking
• CRC calculation unit
• Reset and power management
– Digital and I/O supply: VDD = 2.0 V to 3.6 V
– Analog supply: VDDA = from VDD to 3.6 V
– Power-on/Power down reset (POR/PDR)
– Programmable voltage detector (PVD)
– Low power modes: Sleep, Stop, Standby
– VBAT supply for RTC and backup registers
• Clock management
– 4 to 32 MHz crystal oscillator
– 32 kHz oscillator for RTC with calibration
– Internal 8 MHz RC with x6 PLL option
– Internal 40 kHz RC oscillator
• Up to 55 fast I/Os
– All mappable on external interrupt vectors
– Up to 36 I/Os with 5 V tolerant capability
• 5-channel DMA controller
• One 12-bit, 1.0 µs ADC (up to 16 channels)
– Conversion range: 0 to 3.6 V
– Separate analog supply from 2.4 up to 3.6
• One 12-bit DAC channel
• Two fast low-power analog comparators with
programmable input and output
• Up to 18 capacitive sensing channels
supporting touchkey, linear and rotary touch
sensors
• Up to 11 timers
– One 16-bit 7-channel advanced-control
timer for 6 channels PWM output, with
deadtime generation and emergency stop
– One 32-bit and one 16-bit timer, with up to
4 IC/OC, usable for IR control decoding
– One 16-bit timer, with 2 IC/OC, 1 OCN,
deadtime generation and emergency stop
– Two 16-bit timers, each with IC/OC and
OCN, deadtime generation, emergency
stop and modulator gate for IR control
– One 16-bit timer with 1 IC/OC
– Independent and system watchdog timers
– SysTick timer: 24-bit downcounter
– One 16-bit basic timer to drive the DAC
• Calendar RTC with alarm and periodic wakeup
from Stop/Standby
• Communication interfaces
– Up to two I2C interfaces, one supporting
Fast Mode Plus (1 Mbit/s) with 20 mA
current sink, SMBus/PMBus and wakeup
from Stop mode
– Up to two USARTs supporting master
synchronous SPI and modem control, one
with ISO7816 interface, LIN, IrDA
capability, auto baud rate detection and
wakeup feature
– Up to two SPIs (18 Mbit/s) with 4 to 16
programmable bit frame, one with I2S
interface multiplexed
• HDMI CEC interface, wakeup on header
reception
• Serial wire debug (SWD)
• 96-bit unique ID
• All packages ECOPACK®2