LAN7430-I/Y9X

• Single Chip PCIe to 10/100/1000 Ethernet Controller with integrated:
– PCIe 3.1 PHY supporting 1 Lane at 2.5GT/s
– PCIe 3.1 Endpoint Controller
– Gigabit Ethernet PHY (LAN7430)
– RGMII v1.3 and v2.0 / MII (LAN7431)
• IEEE Std 1588TM-2008 PTP
– Master and Slave Ordinary clock support
– End-to-end or peer-to-peer support
– PTP multicast and unicast message support
– PTP message transport over IPv4/v6, IEEE
802.3
• Power Management
– PCI-PM and ASPM L0s and L1
– L1.1 and L1.2 PCIe sub-states support
– D3 hot / cold with VAUX detection for PME
wakeup
– Wake on LAN support (WoL, AOAC)
– IEEE 802.3az Energy Efficient Ethernet (EEE)
with 100BASE-TX/1000BASE-T Low Power Idle
and 10BASE-Te TX Amplitude Reduction
(LAN7430)


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    SPECIFICATION

    • Gigabit Ethernet PHY (LAN7430)
    – Auto-Negotiation and Auto-MDIX support
    – On-chip termination resistors for differential
    pairs
    – LinkMD® TDR-Based cable diagnostic to identify faulty copper cabling
    – Signal Quality Indicator
    – Quiet-WIRE® technology to reduce line emissions and enhance immunity for 100BASE-TX
    – Programmable LED Outputs for Link, Activity,
    Speed
    – Signal Quality Indicator (SQI) support
    – IEEE 802.3az Energy Efficient Ethernet (EEE)
    • MAC with External Ethernet PHY (LAN7431)
    – RGMII supporting Internal Delay, Non-Internal
    Delay and Hybrid modes
    – MII supporting Fast Ethernet PHY
    – Flexibility to operate at 1.8V, 2.5V, or 3.3V
    – 9220 Byte Maximum Frame Size
    • Gigabit Ethernet MAC includes
    – 10/100/1000Mbps half/full-duplex operation
    (only full-duplex operation at 1000Mbps)
    – Flow control with pause frame for full-duplex
    mode
    – 100/1000Mbps Low Power Idle for EEE
    – MDC/MDIO management for external PHY
    – RX frame, link status, EEE wakeup for WoL
    • DMA Controller
    – Scatter-gather based for efficient data transfer
    to/from multiple on-chip RAM locations
    – Multi-channel for RX prioritization
    • FIFO Controller
    – Utilize internal SRAMs to buffer RX and TX traffic between PCIe and Ethernet
    – TX LSO and TX Checksum Offload
    • Receive Ethernet Packet Filtering
    – IP, TCP/UDP, L3, ICMP/IGMP Checksum offload
    – IEEE 802.1Q VLAN
    – Unicast, Multicast, Broadcast
    – Perfect / Hash Address
    – Priority based channel selection
    – Receive Side Scaling (RSS)
    • PME Support
    – PCIe WAKE# and Beaconing
    – PCIe PME Messaging
    – GPIO, Link Change, Ethernet Frame for wakeup
    • EEPROM / OTP
    – External EEPROM support for MAC address
    and PCIe configuration
    – Integrated OTP memory for EEPROM displacement
    • 1149.1 (JTAG) boundary scan