GD25B256EYIGR

The GD25B256E provide the following data protection methods:
◆ Write Enable (WREN) command: The WREN command is set the Write Enable Latch bit (WEL). The WEL bit will
return to reset by the following situation:
-Power-Up / Software Reset (66H+99H)
-Write Disable (WRDI)
-Write Status Register (WRSR)
-Page Program (PP)
-Sector Erase (SE) / Block Erase (BE) / Chip Erase (CE)
◆ Software Protection Mode: The Block Protect bits (BP4-BP0) define the section of the memory array that can be
read but not changed.
◆ Deep Power-Down Mode: In Deep Power-Down Mode, all commands are ignored except the Release from Deep
Power-Down Mode command and Software Reset (66H+99H).
◆ Write Inhibit Voltage (VWI): Device would reset automatically when VCC is below a certain threshold VWI.

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    SPECIFICATION

    Mfr GigaDevice Semiconductor (HK) Limited
    Series GD25B
    Packaging Tape & Reel (TR)
    Part Status Active
    Memory Type Non-Volatile
    Memory Format FLASH
    Technology FLASH – NOR (SLC)
    Memory Size 256Mbit
    Memory Organization 32M x 8
    Memory Interface SPI – Quad I/O
    Write Cycle Time – Word, Page
    Voltage – Supply 2.7V ~ 3.6V
    Operating Temperature -40°C ~ 85°C (TA)
    Mounting Type Surface Mount
    Package / Case 8-WDFN Exposed Pad
    Supplier Device Package 8-WSON (6×8)