Input levels S0, S1, S2, S3 and E inputs:
For 74HC4067: CMOS level
For 74HCT4067: TTL level
Low ON resistance:
80 (typical) at VCC = 4.5 V
70 (typical) at VCC = 6.0 V
60 (typical) at VCC = 9.0 V
Specified in compliance with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
Typical ‘break before make’ built-in