74HC238D,653

The 74HC238; 74HCT238 decodes three binary weighted address inputs (A0, A1 and A2) to eight
mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1 and E2 and
E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH. This multiple enable
function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four ‘238 ICs
and one inverter. The ‘238 can be used as an eight output demultiplexer by using one of the active
LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include
clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in
excess of VCC.


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    SPECIFICATION

    • Wide supply voltage range from 2.0 to 6.0 V
    • CMOS low power dissipation
    • High noise immunity
    • Demultiplexing capability
    • Multiple input enable for easy expansion
    • Ideal for memory chip select decoding
    • Active HIGH mutually exclusive outputs
    • Input levels:
    • For 74HC238: CMOS level
    • For 74HCT238: TTL level
    • Complies with JEDEC standards
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
    • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
    • Multiple package options
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C