LPC2387FBD100

The LPC2387 microcontroller is based on a 16-bit/32-bit ARM7TDMI-S CPU with
real-time emulation that combines the microcontroller with 512 kB of embedded
high-speed flash memory. A 128-bit wide memory interface and a unique accelerator
architecture enable 32-bit code execution at the maximum clock rate. For critical
performance in interrupt service routines and DSP algorithms, this increases performance
up to 30 % over Thumb mode. For critical code size applications, the alternative 16-bit
Thumb mode reduces code by more than 30 % with minimal performance penalty.
The LPC2387 is ideal for multi-purpose serial communication applications. It incorporates
a 10/100 Ethernet Media Access Controller (MAC), USB full speed device with 4 kB of
endpoint RAM, four UARTs, two CAN channels, an SPI interface, two Synchronous Serial
Ports (SSP), three I2C interfaces, and an I2S interface. This blend of serial
communications interfaces combined with an on-chip 4 MHz internal oscillator, 64 kB
SRAM, 16 kB SRAM for Ethernet, 16 kB SRAM for USB and general purpose use,
together with 2 kB battery powered SRAM makes this device very well suited for
communication gateways and protocol converters. Various 32-bit timers, an improved
10-bit ADC, 10-bit DAC, one PWM unit, a CAN control unit, and up to 70 fast GPIO lines
with up to 12 edge or level sensitive external interrupt pins make this microcontroller
particularly suitable for industrial control and medical systems.


Download Details PDF

Notice:

In stock will ship in 2 days. Real-time inventory pls confirm with us.

INQUIRY ONLINE




    SPECIFICATION

     ARM7TDMI-S processor, running at up to 72 MHz.
     512 kB on-chip flash program memory with In-System Programming (ISP) and
    In-Application Programming (IAP) capabilities. Flash program memory is on the ARM
    local bus for high performance CPU access.
     64 kB of SRAM on the ARM local bus for high performance CPU access.
     16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
     16 kB SRAM for general purpose DMA use; also accessible by the USB.
     Dual Advanced High-performance Bus (AHB) system that provides for simultaneous
    Ethernet DMA, USB DMA, and program execution from on-chip flash with no
    contention between those functions. A bus bridge allows the Ethernet DMA to access
    the other AHB subsystem.
     Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
     General Purpose DMA (GPDMA) on AHB controller that can be used with the SSP
    serial interfaces, the I2S port, and the Secure Digital/MultiMediaCard (SD/MMC) card
    port, as well as for memory-to-memory transfers.