K4B4G1646E-BMMA

DRAM Chip DDR3L SDRAM 4Gbit 256Mx16 1.35V/1.5V 96-Pin FBGA

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    SPECIFICATION

    • JEDEC standard 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)
    • VDDQ = 1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)
    • 400 MHz fCK for 800Mb/sec/pin, 533MHz fCK for 1066Mb/sec/pin,
    667MHz fCK for 1333Mb/sec/pin, 800MHz fCK for 1600Mb/sec/pin
    933MHz fCK for 1866Mb/sec/pin
    • 8 Banks
    • Programmable CAS Latency(posted CAS): 5,6,7,8,9,10,11,12,13
    • Programmable Additive Latency: 0, CL-2 or CL-1 clock
    • Programmable CAS Write Latency (CWL) = 5 (DDR3-800), 6
    (DDR3-1066), 7 (DDR3-1333), 8 (DDR3-1600) and 9(DDR3-1866)
    • 8-bit pre-fetch
    • Burst Length: 8 , 4 with tCCD = 4 which does not allow seamless read
    or write [either On the fly using A12 or MRS]
    • Bi-directional Differential Data-Strobe
    • Internal(self) calibration : Internal self calibration through ZQ pin
    (RZQ : 240 ohm ± 1%)
    • On Die Termination using ODT pin
    • Average Refresh Period 7.8us at lower than TCASE 85C, 3.9us at
    85C < TCASE < 95 C
    • Support Industrial Temp ( -4095C )
    – tREFI 7.8us at -40 °C ≤ TCASE ≤ 85°C
    – tREFI 3.9us at 85 °C < TCASE ≤ 95°C
    • Asynchronous Reset
    • Package : 96 balls FBGA – x16
    • All of Lead-Free products are compliant for RoHS
    • All of products are Halogen-free