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    W5300

    W5300 is a 0.18 µm CMOS technology single chip into which 10/100 Ethernet controller, MAC,
    and TCP/IP are integrated. W5300 is designed for Internet embedded applications where easy
    implementation, stability, high performance, and effective cost are required.
    W5300’s target application is the embedded internet solution requiring high performance such
    as multi-media streaming service. Comparing to existing WIZnet chip solution, W5300 has been
    improved in memory and data process. W5300 is the most appropriate to the products of IPTV,
    IP-STB and DTV transferring multi-media data with high-capacity.
    The Internet connectivity can be implemented easily and quickly only with single chip having
    TCP/IP protocol and 10/100 Ethernet MAC & PHY.

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    In stock will ship in 2 days. Real-time inventory pls confirm with us.

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      SPECIFICATION

      – Supports hardwired TCP/IP protocols : TCP,UDP,ICMP,IPv4,ARP,IGMPv2,PPPoE,Ethernet
      – Supports 8 independent SOCKETs simultaneously
      – High network performance : Up to 50Mbps
      – Supports hybrid TCP/IP stack(software and hardware TCP/IP stack)
      – Supports PPPoE connection (with PAP/CHAP Authentication mode)
      – IP Fragmentation is not supported
      – Internal 128Kbytes memory for data communication(Internal TX/RX memory)
      – More flexible allocation internal TX/RX memory according to application throughput
      – Supports memory-to-memory DMA (only 16bit Data bus width & slave mode)
      – Embedded 10BaseT/100BaseTX Ethernet PHY
      – Supports auto negotiation (Full-duplex and half duplex)
      – Supports auto MDI/MDIX(Crossover)
      – Supports network Indicator LEDs (TX, RX, Full/Half duplex, Collision, Link, Speed)
      – Supports a external PHY instead of the internal PHY
      – Supports 16/8 bit data bus width
      – Supports 2 host interface mode(Direct address mode & Indirect address mode)
      – External 25MHz operation frequency (For internal PLL logic, period=40ns)
      – Internal 150MHz core operation frequency (PLL_CLK, period=about 6.67ns)
      – Network operation frequency (NIC_CLK : 25MHz(100BaseTX) or 2.5MHz(10BaseT))
      – 3.3V operation with 5V I/O signal tolerance
      – Embedded power regulator for 1.8V core operation
      – 0.18 µm CMOS technology
      – 100LQFP 14X14 Lead-Free Package